Center to develop new materials, process paradigms for next-generation semiconductors
6/30/2021 9:58:58 AM
Integrated circuits (ICs), or “chips,” which are the heart of most modern-day electronics, ranging from high-performance computers to smartphones, rely on interconnects to link elements together. Interconnects are wires that serve as the nervous system for the IC, transporting information not only between local components, such as on-chip transistors, but also from chip-to-chip and module-to-module.
As devices grow increasingly smaller, there is greater demand for compact, yet powerful ICs with scaled interconnects that consume very little energy and operate with low latency (or delay). At the same time, big-data applications have exponentially increased the processing load, making interconnects the performance bottleneck and energy hog in today’s chips.
Researchers at the University of Illinois Urbana-Champaign are working to develop new material and process paradigms for electrical and photonic interconnects and on-chip memory, with the goal of reducing the energy consumption associated with data transportation. Through the first stage of an Industry-University Cooperative Research Centers (IUCRC) grant, funded by the National Science Foundation, the team will recruit industry members and map out a strategy for enabling highly energy efficient computing systems – which is imperative for American competitiveness in the microelectronics field.
The new Center for Aggressive Scaling by Advanced Processes for Electronics and Photonics (ASAP-EP) will be housed in UIUC’s Holonyak Micro & Nanotechnology Lab (HMNTL).
“We intend to provide the semiconductor industry with technology, methods, and science so that semiconductors can efficiently operate at the speeds and scales that are needed to create next-generation computing systems at advanced technology nodes,” said Shaloo Rakheja, the project’s principal investigator and assistant professor of electrical and computer engineering.
The Center will focus on developing new processes and materials that lower delay and energy dissipation of interconnects, which are responsible for more than 50% of a chip’s delay and energy consumption. Researchers will find new materials for ultra-thin interconnects at the nanoscale level, bring memory closer to the computer nodes, and identify new connectivity technology at the macroscale level, since spectrum scarcity and limitations of the RF band are likely as more than 80 billion devices are projected to be online by 2024.
As part of the IUCRC program, the UIUC team will work closely with industry sponsors, who will help in defining the direction of ASAP projects. The program provides the opportunity for students in the center to learn more about industry needs and provides companies with access to tomorrow’s workforce.
“In addition to the technology aspects, the center provides industry sponsors direct access to a large pool of talented, diverse, and well-trained students, who will be pushing the envelope of future technologies in this industry,” said Xiuling Li, HMNTL interim director and Donald Biggar Willet Professor of Engineering.
The ASAP research will utilize new tools recently installed at HMNTL, including a 150kV E-Beam Lithography (EBL) system from Elionix, which has a higher energy capability than any other in North America. This high-precision tool allows researchers and students to print features as small as four nanometers in size.
“The University of Illinois has the right people and tools in place to make major contributions to the microelectronics and semiconductor industry,” said Rashid Bashir, Dean of The Grainger College of Engineering. “With our rich history of ground-breaking discoveries in microelectronics and working with industry on grand challenges, UIUC is well poised to lead new innovations that will help keep the United States at the forefront of semiconductor technology.”