The demand for faster, smaller, and more energy efficient devices has led to a parallel demand for advances in novel transistors, which function as the nerves of electronics. Several years ago, HMNTL Interim Director Xiuling Li and former student Yi Song, now at Western Digital, created a design for stacked nanowire transistors for radio frequency electronics – such as smartphones that run on 5G.
The technology was recently licensed by one of the world’s largest microelectronics companies.
“We designed a strategy to put more transistors in devices by changing their geometry, which enables the continuation of scaling,” said Li, a Donald Biggar Willett Professor in Engineering.
The design uses a gate-all-around approach, meaning that the gate (which controls the signals by an electric field) wraps the vertically stacked nanowire channels (where the current flows). And the nanowires, separated by air bridges, are individually configured with different dimensions and compositions. This enables better on-chip linearity, which keeps the signal from becoming distorted at different power levels.
This approach was first published in 2012. The technology was issued a patent in 2015.
“We’re using the silicon CMOS architecture with a twist for radiofrequency electronics,” Li said. “It improves performance at a smaller footprint.”