Holonyak Lab professor develops dielectrics for high-temperature electronics

Many industries, including aerospace, automotive, and petrochemical, call for electronics that can operate reliably in extremely high temperatures. However, standard CMOS devices (a type of semiconductors) have a very limited maximum operating temperature (~250^oC). Active and passive cooling of the electronics can mitigate some of these problems, but additional cooling components introduce complexity, weight, and size to the system.

Developing electronic devices that can withstand extremely high-temperatures is critical to address this issue. As part of the newly funded project, “Advanced tandem gate dielectrics for high-temperature electronics,” Holonyak Lab Assistant Professor Wenjuan Zhu hopes to develop gate dielectrics that can withstand temperatures above 500°C (932°F), by combining various gate dielectrics layer-by-layer.

Problems with current high-temperature electronics come down to the availability of high-quality and reliable gate dielectrics, which is the barrier between the gate electrode and the channel (between source and drain) in a metal oxide field-effect transistor (MOSFET). Existing electronics have several limitations when exposed to high temperatures, including high gate-leakage current, threshold voltage instability, mobility degradation, and short lifetime.

Some gate dielectrics have low crystallization temperature, which causes a high leakage current at high temperature. The charge trapping at high temperatures and metal diffusion will lead to instability of the threshold voltage in a MOSFET. In addition, the aggravated charge scattering degrades the mobility of the carriers at high temperatures, resulting in a lower operation speed in the device. Furthermore, high temperature operation also can impose mechanical stress on the device due to the mismatch of thermal expansion coefficient in different layers. All these factors will accelerate the device degradation and breakdown, meaning that such devices would have a shorter lifetime at high temperatures.

To address these challenges, gate dielectrics for high-temperature metal oxide field-effect transistor (MOSFETs) need to have a large band offset, low interface/bulk trap density, high crystallization temperature, high dielectric constant, and a coefficient of thermal expansion matching that of the substrate.

“What we are doing in this project is to develop tandem gate dielectrics consisting of atomically thin layers of oxides and nitrides,” said Zhu, an assistant professor of electrical and computer engineering. “By combining various dielectrics layer-by-layer, we can make an artificial dielectric that combine the strengths of the individual dielectrics while overcoming their weakness.”

These high-temperature gate dielectrics will have applications including airplane engine maintenance, nuclear reactor monitors, deep earth drilling, aerospace exploration, and in the petroleum industry.

This research is funded by the Defense Advanced Research Projects Agency as a Young Faculty Award.